Semiconductor sidewall shape estimation

For process control, linewidth measurements are commonly performed on semiconductor wafers using top-down images from critical dimension measurement scanning electron microscopes (CD-SEMs). However, a measure of the line sidewall shape will be required as linewidths continue to shrink. Sidewall shape can be measured by physically cleaving the device and performing an SEM scan of the cross section, but this process is time consuming and results in destruction of product wafers. We develop a technique to estimate sidewall shape from top-down SEM images using pattern recognition based on historical cross section/top-down image pairs. Features are computed on subimages extracted from the top-down images. Several combinations of principal component analysis (PCA) and flavors of linear discriminant analysis (LDA) are employed to reduce the dimensionality of the feature vectors and maximize the spread between different sidewall shapes. Direct, weighted LDA (DW-LDA) results in a feature set that provides the best sidewall shape estimation. Experimental testing of the sidewall estimation system shows a root mean square error of approximately 1.8% of the linewidth, showing that this system is a viable method for estimating sidewall shape with little impact on the fabrication process (no new hardware and a minimal increase in process setup). © 2004 SPIE and IS&T. [DOI: 10.1117/1.1763586]